Disable/Enable boot paths/features in the RP2350 mask ROM. Disables always supersede enables. Enables are provided where there are other configurations in OTP that must be valid. (RBIT-3)
| DISABLE_BOOTSEL_EXEC2 | |
| ENABLE_BOOTSEL_LED | Enable bootloader activity LED. If set, bootsel_led_cfg is assumed to be valid |
| ENABLE_BOOTSEL_NON_DEFAULT_PLL_XOSC_CFG | Enable loading of the non-default XOSC and PLL configuration before entering BOOTSEL mode. Ensure that BOOTSEL_XOSC_CFG and BOOTSEL_PLL_CFG are correctly programmed before setting this bit. If this bit is set, user software may use the contents of BOOTSEL_PLL_CFG to calculated the expected XOSC frequency based on the fixed USB boot frequency of 48 MHz. |
| FLASH_IO_VOLTAGE_1V8 | If 1, configure the QSPI pads for 1.8 V operation when accessing flash for the first time from the bootrom, using the VOLTAGE_SELECT register for the QSPI pads bank. This slightly improves the input timing of the pads at low voltages, but does not affect their output characteristics. If 0, leave VOLTAGE_SELECT in its reset state (suitable for operation at and above 2.5 V) |
| FAST_SIGCHECK_ROSC_DIV | Enable quartering of ROSC divisor during signature check, to reduce secure boot time |
| FLASH_DEVINFO_ENABLE | Mark FLASH_DEVINFO as containing valid, ECC’d data which describes external flash devices. |
| OVERRIDE_FLASH_PARTITION_SLOT_SIZE | Override the limit for default flash metadata scanning. The value is specified in FLASH_PARTITION_SLOT_SIZE. Make sure FLASH_PARTITION_SLOT_SIZE is valid before setting this bit |
| SINGLE_FLASH_BINARY | Restrict flash boot path to use of a single binary at the start of flash |
| DISABLE_AUTO_SWITCH_ARCH | Disable auto-switch of CPU architecture on boot when the (only) binary to be booted is for the other Arm/RISC-V architecture and both architectures are enabled |
| SECURE_PARTITION_TABLE | Require a partition table to be signed |
| HASHED_PARTITION_TABLE | Require a partition table to be hashed (if not signed) |
| ROLLBACK_REQUIRED | Require binaries to have a rollback version. Set automatically the first time a binary with a rollback version is booted. |
| DISABLE_FLASH_BOOT | |
| DISABLE_OTP_BOOT | Takes precedence over ENABLE_OTP_BOOT. |
| ENABLE_OTP_BOOT | Enable OTP boot. A number of OTP rows specified by OTPBOOT_LEN will be loaded, starting from OTPBOOT_SRC, into the SRAM location specified by OTPBOOT_DST1 and OTPBOOT_DST0. The loaded program image is stored with ECC, 16 bits per row, and must contain a valid IMAGE_DEF. Do not set this bit without first programming an image into OTP and configuring OTPBOOT_LEN, OTPBOOT_SRC, OTPBOOT_DST0 and OTPBOOT_DST1. Note that OTPBOOT_LEN and OTPBOOT_SRC must be even numbers of OTP rows. Equivalently, the image must be a multiple of 32 bits in size, and must start at a 32-bit-aligned address in the ECC read data address window. |
| DISABLE_POWER_SCRATCH | |
| DISABLE_WATCHDOG_SCRATCH | |
| DISABLE_BOOTSEL_USB_MSD_IFC | |
| DISABLE_BOOTSEL_USB_PICOBOOT_IFC | |
| DISABLE_BOOTSEL_UART_BOOT | |
| DISABLE_XIP_ACCESS_ON_SRAM_ENTRY | Disable all access to XIP after entering an SRAM binary. Note that this will cause bootrom APIs that access XIP to fail, including APIs that interact with the partition table. |
| DISABLE_SRAM_WINDOW_BOOT |